1. Field of the Invention
The present invention generally relates to systems and methods for classifying defects detected on a wafer.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield in the manufacturing process and thus higher profits. Inspection has always been an important part of fabricating semiconductor devices such as ICs. However, as the dimensions of semiconductor devices decrease, inspection becomes even more important to the successful manufacture of acceptable semiconductor devices because smaller defects can cause the devices to fail. For instance, as the dimensions of semiconductor devices decrease, detection of defects of decreasing size has become necessary since even relatively small defects may cause unwanted aberrations in the semiconductor devices.
A design “hot spot” is a well-defined structure or rule within the design that has been identified as a relatively high risk for failure, either through simulations, defect inspection, or electrical testing. Hot spots are often due to optical proximity effects. For example, when a lithography tool such as a scanner “prints” a wafer, structures that are relatively close to each other can interact optically (meaning that the printing of one structure can affect the printing of another structure due to their proximity). This interaction can elevate the risk of failure at a particular location. Two structures may be considered to be “close” to one another if they are within a few multiples of the wavelength of light used to print the wafer (e.g., about 200 nm to about 250 nm).
Current methods of identifying whether a defect “belongs” to a hot spot assume that the coordinate accuracy of the inspection tool used to detect the defect is wider than the bounds of the polygons that define the hot spot. However, the coordinate accuracy of many modern optical and scanning electron microscope (SEM) imaging tools can often be smaller than the bounds of the hot spots. When current methods for identifying whether a defect belongs to a hot spot are applied to one of these modern tools, it effectively negates the advantages provided by the improved coordinate accuracy of these tools.
Accordingly, it would be advantageous to develop systems and methods for classifying defects detected on a wafer that do not have one or more of the disadvantages described above.